Zebu flow Engineer

SiFive develops RISC-V processor platforms for applications including AI, automotive, data center, mobile and consumer computing. This engineer will build emulator and FPGA flows and investigate hardware and software failures in RISC-V systems.

• Build and maintain modular flows for Synopsys ZeBu models
• Move compilation steps into the internal build environment
• Analyze failures across RISC-V CPU hardware and software
• Debug designs using waveform dumps, ILA and JTAG
• Develop Python scripts to automate debugging and runtime workflows

Education

Engineering degree

Degree

computer science, electronics and communication engineering

Experience

1+ years

Domain

semiconductor risc-v

SiFive India Pvt Ltd has 25 open roles in Bangalore, at SiFive Bengaluru (Bagmane World Technology Centre). See every SiFive India Pvt Ltd role.