Sr Staff Static Timing Analysis (STA) Lead

SiFive develops RISC-V compute platforms, including high-performance CPUs for data center applications. You will own timing sign-off, methodologies, tracking platforms, and SDC quality for next-generation CPU designs.

• Serve as the timing subject matter expert for the CPU design team
• Develop methodologies to drive early timing convergence
• Architect platforms to track timing convergence metrics
• Lead SDC quality assurance across internal flows
• Define timing sign-off criteria, margins, and closure processes

Education

Engineering degree

Degree

electrical and electronics, electronics and communication, computer science, vlsi

Experience

10+ years

Domain

semiconductors

SiFive India Pvt Ltd has 25 open roles in Bangalore, at SiFive Bengaluru (Bagmane World Technology Centre). See every SiFive India Pvt Ltd role.