Staff Design Verification Infrastructure Engineer - VIPs and Testbench

SiFive develops RISC-V compute platforms for applications including AI, automotive, data centers, mobile and consumer devices. This engineer will build reusable verification infrastructure, VIPs, AIPs and testbench components for design verification teams.

• Architect and maintain scalable design verification infrastructure
• Develop Scala and Chisel libraries for verification intent and testbench generation
• Build VIPs, AIPs and testbench components using SystemVerilog and UVM
• Create test plans and testbenches to verify and release components
• Educate verification teams on platform best practices

Domain

semiconductors

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