ASIC Design Engineer
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About the role
Axiado develops secure silicon and systems for digital infrastructure, including data centers and cloud platforms. You will design and optimize SoC blocks across the ASIC flow, from micro-architecture and RTL through validation and production maturity.
What you'll do
- Develop SoC designs and implementations
- Design micro-architecture and code RTL blocks
- Optimize performance, bandwidth, power, and timing
- Prototype designs with FPGA engineers
- Support test program development and chip validation
- Collaborate with cross-functional ASIC development teams
Skills
Must have
- RTL design
- Verilog
- SOC integration
- Micro-architecture design
- RTL synthesis
- Timing closure
- Assertions
- Coverage analysis
- Interface protocols
- FPGA emulation
Nice to have
- Silicon bring-up and debug
Tools
- Haps
- Veloce
- Bitbucket
- Jenkins
- Jira
Who it's for
- Experience
- 8+ years
- Domain
- semiconductors
About Axiado
Axiado has 3 open roles in Bangalore, at Axiado Bengaluru, Table Space Towers. See every Axiado role.
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