Leader/Manager, ASIC Design Verification Engineering || Verilog, UVM, TestBench, Technical Leadership, Hardware Emulation, SOC || Exp - 15 + years
A free account shows the apply link for every role and matches you to the ones that fit your resume.
About the role
Cisco SiliconOne develops advanced ASICs for enterprise and service provider networking products. This leader will manage design verification teams and guide ASIC verification from testbench development through emulation and silicon validation.
What you'll do
- Lead ASIC design verification teams and deliver high-quality chips
- Define and improve reusable UVM and SystemVerilog testbenches
- Coordinate verification across simulation, emulation, and ASIC bring-up
- Plan test coverage and work with designers to close coverage gaps
- Mentor engineers and drive technical decisions across verification teams
Skills
Must have
- Asic design verification
- Systemverilog
- Uvm
- C
- C++
- Code coverage
- Hardware emulation
- System validation
Nice to have
- Verification methodology
- Flow automation
- Scripting
- Makefiles
Tools
- Eve
- Veloce
Who it's for
- Education
- Engineering degree
- Experience
- 13+ years
- Domain
- networking hardware
About Cisco
Cisco has 173 open roles in Bangalore, at Cisco Bangalore Campus (Cessna Business Park). See every Cisco role.
More at Cisco
Entry level · 1 to 3 years
Lead or staff · 11 to 15 years
Senior · 7 to 11 years
Lead or staff · 10+ years
Senior · 7 to 12 years
Entry level · 0 to 3 years
Mid level · 2 years
Lead or staff · 8+ years
Similar roles
All engineering management jobs
Bosch Global Software Technologies · Director and above · 18+ years

Morgan Stanley · Director and above · 15+ years




