Senior Engineer, DFT Engineering

Analog Devices develops semiconductor technologies connecting the physical and digital worlds. The DFT Engineer will implement and verify test structures, generate ATPG patterns, and debug test failures for integrated circuits.

• Design and implement scan chains, compression, and built-in self-test structures
• Run DFT design-rule checks and optimize testability
• Generate ATPG test patterns for stuck-at and transition faults
• Verify DFT structures and patterns in RTL and netlists
• Coordinate DFT strategy with verification and physical design teams
• Analyze test failures and mentor junior DFT engineers

Education

Engineering degree

Degree

electrical engineering, electronic engineering

Experience

3 to 8 years

Domain

semiconductors

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