Staff Engineer – DFT Engineering

Analog Devices develops semiconductor technologies connecting the physical and digital worlds. The DFT Engineer will implement and validate test structures, generate ATPG patterns, and debug test failures for integrated circuits.

• Implement scan chains, compression, and built-in self-test structures
• Run DFT rule checks on RTL and netlist databases
• Generate manufacturing ATPG test patterns using test compression
• Design and verify MBIST structures, including repair
• Validate DFT structures and patterns with and without SDF
• Debug test failures and guide junior DFT engineers

Education

Engineering degree

Degree

electrical engineering, electronic engineering

Experience

7 to 10 years

Domain

semiconductors

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