Chassis IP Senior Design Engineer
A free account shows the apply link for every role and matches you to the ones that fit your resume.
About the role
Intel's Chassis Group develops component and foundation IP for SoC chassis. This engineer will design and optimize RTL for interconnect IP, support integration, and define architecture and microarchitecture features.
What you'll do
- Develop RTL designs and simulations for functional units, IP blocks, and subsystems
- Define architecture and microarchitecture for interconnect IP and subsystems
- Optimize RTL for power, performance, area, and timing
- Evaluate trade-offs across area, bandwidth, timing, and reliability
- Support customer IP integration and verification workflows
Skills
Must have
- Verilog
- Systemverilog
- RTL design
- Amba
- Pcie
- Cxl
- Lint
- Cdc
- Rdc
- Power performance area optimization
Nice to have
- Router design
- Switch design
- Protocol conversion
- Debug/trace networks
- Flow control
- Hashing
- Dvfs
- Upf
Who it's for
- Education
- Engineering degree
- Degree
- electrical engineering, computer engineering
- Experience
- 10+ years
- Domain
- semiconductors
About Intel
Intel has 33 open roles in Bangalore, at Intel India, Sarjapur Ring Road campus (SRR). See every Intel role.
More at Intel
Mid level · Hybrid · 3+ years
Mid level · On-site · 2+ years
Mid level · Hybrid · 3+ years
Mid level · On-site · 3+ years
Mid level · Hybrid · 2+ years
Mid level · Hybrid · 3+ years
Manager · On-site · 14+ years
Senior · On-site · 7 to 12 years
Similar roles
All embedded and firmware jobs
GalaxEye · Entry level · 1 to 2 years · Fresher friendly
Walmart Global Tech India (WM Global Technology Services India) · Mid level · On-site · 2+ years
Bosch Global Software Technologies · Senior · 5 to 10 years
Analog Devices · Mid level · 4 to 12 years