CPU Senior Floor Plan Engineer

Intel develops CPUs and other computing technologies. You will plan CPU floorplans and pin placement, integrate dies, estimate die size, and resolve physical design challenges through tapeout.

• Define CPU IP dimensions and optimize die area and product costs
• Plan floorplans, pin placement, boundaries, and pin densities
• Integrate dies and complete checks before tapeout
• Evaluate floorplanning tools, methods, and flows
• Collaborate with architecture, DFT, package, clock, and power teams

Education

Engineering degree

Degree

electrical engineering, electronics engineering

Experience

2+ years

Domain

semiconductors

Intel has 33 open roles in Bangalore, at Intel India, Sarjapur Ring Road campus (SRR). See every Intel role.