DFT Engineer (Architect / Manager / Sr. Manager)

Velaura is building compute technology for cloud, edge, and Physical AI applications. You will lead DFT architecture and execution for complex silicon designs, from test planning through production readiness.

• Define DFT architecture and methodology for ASIC and SoC designs
• Lead scan, ATPG, memory test, and logic BIST implementation
• Own DFT execution from design integration through production ramp
• Drive test coverage analysis, diagnosis, and pattern validation
• Coordinate DFT implementation with design, validation, and manufacturing teams
• Mentor DFT engineers and improve tools, flows, and methodologies

Experience

15+ years

Domain

ai semiconductors

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