Lead STA Engineer

NXP Semiconductors develops semiconductor products. This role leads static timing analysis, timing closure, and automation for complex ASIC and SoC designs.

• Create and maintain SDC constraints for block and full-chip designs
• Analyze timing across multiple corners and operating modes
• Debug setup, hold, transition, and path-based timing violations
• Drive timing closure through ECO generation and evaluation
• Collaborate with RTL, physical design, and DFT teams
• Guide a small team of STA engineers

Education

Engineering degree

Degree

electronics, electrical engineering, computer engineering

Experience

7+ years

Domain

semiconductors

NXP Semiconductors India has 37 open roles in Bangalore, at NXP Manyata Tech Park. See every NXP Semiconductors India role.