PRINCIPAL PHYSICAL VERIFICATION ENGINEER
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About the role
NXP Semiconductors develops semiconductor products and silicon designs. The engineer will own block-level and full-chip physical verification signoff, resolve design-rule violations, and support tapeout readiness.
What you'll do
- Perform block-level and full-chip DRC, LVS, ERC, antenna, density and reliability checks
- Drive signoff closure by identifying and resolving physical verification violations
- Develop and maintain verification runsets, decks and automation flows
- Analyze foundry decks and PDK updates for process compliance
- Lead tapeout readiness reviews and deliver high-quality design databases
- Mentor junior engineers and review their work
Skills
Must have
- Physical verification
- Design rule checking
- Layout versus schematic
- Electrical rule checking
- Antenna checks
- Density checks
- Reliability checks
- Signoff closure
- Runset development
- Tapeout readiness
Nice to have
- Floorplanning
- Power delivery network design
- Placement
- Clock tree synthesis
- Routing
- Electromigration and ir analysis
- Latch-up checks
- Esd checks
Who it's for
- Domain
- semiconductors
About NXP Semiconductors India
NXP Semiconductors India has 37 open roles in Bangalore, at NXP Manyata Tech Park. See every NXP Semiconductors India role.
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