Senior CAD Engineer - Floor Plan
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About the role
Intel develops semiconductor products, and this team supports CPU IP design planning and physical design methodologies. The CAD Engineer will develop and deploy automation frameworks, support floorplanning flows, and improve methodology quality and productivity.
What you'll do
- Deploy design planning and RTL-to-floorplan methodologies across CPU IP programs
- Develop and maintain automation for floorplanning, PPA estimation, and congestion analysis
- Debug flow, tool, and methodology issues for physical design teams
- Build dashboards and reporting to track methodology health and quality
- Evaluate and integrate new EDA capabilities with CAD teams and vendors
- Explore AI approaches to improve flow debugging and engineering productivity
Skills
Must have
- Physical design
- Rtl-to-floorplan
- Design planning
- Floorplanning
- Ppa analysis
- Python
- Tcl
- Shell scripting
- CAD automation
Nice to have
- Machine learning
- Data analytics
- LLMs
- Agentic AI
- Timing analysis
- Power analysis
- Congestion analysis
- Routability analysis
Tools
- Synopsys fusion compiler
- Icc2
- Cadence innovus
Who it's for
- Education
- Master's degree
- Degree
- electrical engineering, computer engineering, computer science, vlsi
- Experience
- 4+ years
- Domain
- semiconductors
About Intel
Intel has 33 open roles in Bangalore, at Intel India, Sarjapur Ring Road campus (SRR). See every Intel role.
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