Senior Lead Design Engineer
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About the role
NXP's MME team develops SoCs for automotive, edge, radar processing and advanced analog businesses. This engineer will lead SoC debug, microarchitecture and integration through tape-out and support post-silicon debugging.
What you'll do
- Lead SoC debug, microarchitecture and integration from specification through tape-out
- Implement SoC design methodologies and practices across business lines
- Sign off RTL, timing constraints, CDC and RDC
- Coordinate with verification, DFT and synthesis functions for production-quality silicon
- Document SoC design and microarchitecture for other functions
- Support silicon-related debugging during the post-silicon phase
Skills
Must have
- Asic design
- RTL design
- Verilog
- SOC integration
- Microarchitecture
- SOC debug
- Chip assembly
- RTL signoff
- Cdc
- Rdc
Nice to have
- Axi
- Ace
- Apb
- Atb
- Risc-v
- Pci express
- Usb
- Ddr
Tools
- Coresight
- Etm
- Stm
- Dap
- Cti
- Jtag
- Swd
- Trace32
Who it's for
- Experience
- 5 to 10 years
- Domain
- semiconductors
About NXP Semiconductors India
NXP Semiconductors India has 37 open roles in Bangalore, at NXP Manyata Tech Park. See every NXP Semiconductors India role.
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