Staff Engineer

Broadcom's Central Engineering team develops complex memory and IO subsystems for chip designs. This engineer will develop and verify RTL, memory BIST, and digital subsystems through chip sign-off.

• Develop and verify RTL for digital and memory subsystems
• Work on memory BIST using Tessent and embedded MBIST
• Verify and sign off MBIST, ATPG, and RSQ
• Perform formal verification, clock-domain checks, and power and timing sign-off
• Create verification suites for complex subsystems using UVM or OVM

Domain

semiconductors

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