ASIC Design Verification Engineer | UVM | Exp 8+ Years
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About the role
Cisco develops networking and infrastructure products that connect and protect organizations. You will build ASIC design verification environments, qualify designs, and support ASIC bring-up across Cisco platforms.
What you'll do
- Architect block, cluster, and top-level verification environments
- Develop and maintain verification infrastructure and test plans
- Write constrained-random and directed tests for ASIC designs
- Review code and functional coverage to ensure verification completeness
- Qualify designs with gate-level simulations and emulation
- Manage ASIC bring-up and debug integration issues with engineering teams
Skills
Must have
- Asic verification
- Uvm
- Systemverilog
- Testbench development
- Perl
- Python
- Functional coverage
- Code coverage
- Gate-level simulation
Nice to have
- P4
- Formal verification
- Pcie
- Ethernet
- Rdma
- Tcp
Tools
- Veloce
- Palladium
- Zebu
- Haps
Who it's for
- Education
- Engineering degree
- Experience
- 8+ years
- Domain
- networking hardware
About Cisco
Cisco has 173 open roles in Bangalore, at Cisco Bangalore Campus (Cessna Business Park). See every Cisco role.
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