ASIC DFT Engineer || MBIST, SCAN, ATPG, JTAG || Experience - 4 to 8 years
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About the role
Cisco's Common Hardware Group develops silicon, optics, and hardware platforms for networking products. You will implement and integrate DFT features and support test logic validation, debugging, and post-silicon validation.
What you'll do
- Implement DFT features for automated and in-system test, debug, and diagnostics
- Develop DFT IP and integrate testability features into full-chip designs
- Coordinate test logic integration and validation with design and physical-design teams
- Debug DFT solutions with minimal mentorship
- Support post-silicon validation and work with ATE patterns
Skills
Must have
- Design for test
- Jtag
- Scan insertion
- Atpg
- Boundary scan
- Gate-level simulation
- Post-silicon validation
- Tcl
- Python
- Perl
Nice to have
Tools
- Testmax
- Tetramax
- Tessent
- Vcs
Who it's for
- Education
- Engineering degree
- Degree
- electrical engineering, computer engineering
- Experience
- 4 to 8 years
- Domain
- networking hardware
About Cisco
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