ASIC Verification Technical Leader || Verilog, System Verilog, Testbench, UVM || Exp - 10+ years
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About the role
Cisco's Common Hardware Group develops silicon and hardware platforms for networking products, including Cisco Silicon One. You will build and maintain ASIC design verification environments, develop tests and coverage, and support emulation and ASIC bring-up.
What you'll do
- Architect block, cluster, and top-level design verification infrastructure
- Build and maintain verification environments from scratch
- Develop test plans and tests using constrained-random and directed stimulus
- Implement and review code and functional coverage
- Qualify designs with gate-level simulations and support emulation
- Lead ASIC bring-up and debug issues with cross-functional teams
Skills
Must have
- Asic design verification
- Uvm
- Systemverilog
- Testbench development
- Systemverilog constraints
- Perl
- Python
- Code coverage
- Functional coverage
- Gate-level simulation
Nice to have
- Networking asics
- Formal verification
- Pcie
- Ethernet
- Rdma
- Ipv4
- Ipv6
- Tcp
Tools
- Veloce
- Palladium
- Zebu
- Haps
Who it's for
- Education
- Engineering degree
- Degree
- electrical engineering, computer engineering
- Experience
- 10+ years
- Domain
- networking hardware
About Cisco
Cisco has 173 open roles in Bangalore, at Cisco Bangalore Campus (Cessna Business Park). See every Cisco role.
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