DFT ASIC Engineering Technical Leader | ATPG | 10 to 14 years | Bangalore
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About the role
Cisco Silicon One develops programmable silicon for networking and routing products. You will lead a DFT engineering team across design, silicon debug and production qualification.
What you'll do
- Lead and develop a team of DFT engineers
- Guide DFT implementation, including ATPG, scan compression and memory BIST
- Drive DFT work through design, silicon debug and production qualification
- Coordinate DFT strategies with architecture, design and verification teams
- Establish and standardize DFT methods across projects
- Provide team feedback, career development and performance evaluations
Skills
Must have
- Design for test
- Scan insertion
- Built-in self-test
- Boundary scan
- Silicon bring-up
- Production qualification
- Team management
Nice to have
- Automatic test pattern generation
- Scan compression
- Memory bist
Who it's for
- Education
- Engineering degree
- Degree
- electrical engineering, computer engineering
- Experience
- 10 to 14 years
- Domain
- networking silicon
About Cisco
Cisco has 173 open roles in Bangalore, at Cisco Bangalore Campus (Cessna Business Park). See every Cisco role.
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