DFT Engineering Technical Lead || ATPG, SCAN, JTAG, MBIST, TestMax, Tessent || Exp - 10+ years

Cisco's Common Hardware Group develops silicon, optics and hardware platforms for networking products. You will implement and integrate design-for-test features and support test validation and debug across silicon design phases.

• Implement DFT features for ATE, in-system test, debug and diagnostics
• Develop reusable DFT IP with cross-functional teams
• Integrate testability features into full-chip designs
• Validate test logic across implementation and post-silicon flows
• Develop reusable test and debug strategies for silicon devices

Education

Engineering degree

Degree

electrical engineering, computer engineering

Experience

10 to 12 years

Domain

networking silicon hardware

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