Lead Verification Engineer

Cadence develops electronic design software, hardware and IP for semiconductor and system design. This engineer will validate Palladium emulation features, manage regressions and improve verification flows.

• Verify upcoming features in Palladium emulation
• Manage regression suites and debug verification issues
• Review functional specifications and test plans
• Guide and mentor team members on technical deliverables
• Improve emulation validation and verification flows
• Ensure the quality of releases and features

Education

Engineering degree

Degree

electrical engineering, electronics, computer science

Experience

3+ years

Domain

electronic design automation

Cadence Design Systems has 27 open roles in Bangalore, at Cadence Bengaluru, RMZ EcoWorld. See every Cadence Design Systems role.