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Principal Design Engineer

  • Senior
  • Full time
  • 7 to 10 years

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About the role

Cadence provides technology and engineering services for semiconductor design and verification. This engineer will lead design verification strategy and execution for customer ASIC projects, develop verification environments, and guide junior engineers.

What you'll do

  • Define verification strategies and plans for customer ASIC projects
  • Design reusable testbenches, monitors, scoreboards, and checkers
  • Develop test cases and constrained-random sequences to improve coverage
  • Debug complex design issues and coordinate fixes with design engineers
  • Analyze coverage metrics and oversee gate-level simulations
  • Mentor junior engineers and manage verification schedules

Skills

Must have

Nice to have

  • Low-power verification

Tools

  • Xcelium
  • Vcs
  • Questa
  • Verisium
  • Simvision

Who it's for

Education
Engineering degree
Degree
electronics, vlsi
Experience
7 to 10 years
Domain
semiconductor design

About Cadence Design Systems

Cadence Design Systems has 27 open roles in Bangalore, at Cadence Bengaluru, RMZ EcoWorld. See every Cadence Design Systems role.

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