Senior Engineer, Logic Equivalence CAD

Marvell develops semiconductor solutions for enterprise, cloud, AI, and carrier data infrastructure. This engineer develops and supports logic equivalence and functional ECO flows for design verification and tape-outs.

• Develop and maintain logic equivalence checking flows
• Debug and resolve equivalence issues
• Develop RTL-to-gate and gate-to-gate equivalence flows
• Coordinate equivalence handoffs with synthesis and DFT teams
• Contribute to functional ECO flows and low-power checks
• Support flow deployment and integration into the CAD platform

Education

Engineering degree

Degree

electrical engineering, computer science

Experience

2+ years

Domain

semiconductors

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