Senior Staff Verification Engineer For Worldguard
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About the role
SiFive develops RISC-V compute platforms for applications including AI, automotive, data centers, and mobile devices. This engineer will plan and implement verification for processor and security designs, develop testbenches, and drive coverage closure.
What you'll do
- Define verification strategies, test plans, test cases, and coverage goals
- Develop reusable constrained-random verification environments using SystemVerilog and UVM
- Write sequences and tests to exercise processor IP corner cases
- Debug RTL failures and testbench issues using waveform viewers
- Define and track functional and code coverage metrics
Skills
Must have
- Systemverilog
- Uvm
- Object-oriented programming
- Cpu verification
- Processor verification
- Risc-v
- Security architecture
- Python
- C
- C++
Nice to have
- Ovm
- Vmm
- Axi
- Ahb
- Pcie
- Cpu microarchitecture
- Constrained-random verification
- Functional coverage
Tools
- Verdi
- Simvision
Who it's for
- Education
- Engineering degree
- Degree
- engineering
- Experience
- 10+ years
- Domain
- semiconductors
About SiFive India Pvt Ltd
SiFive India Pvt Ltd has 25 open roles in Bangalore, at SiFive Bengaluru (Bagmane World Technology Centre). See every SiFive India Pvt Ltd role.
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