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Staff Digital Verification Engineer

  • Senior
  • Full time
  • 7+ years

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About the role

Renesas develops semiconductor products, including power management SoCs for automotive, industrial, infrastructure and computing applications. You will own verification of complex digital blocks from planning through coverage closure, building UVM environments and debugging results.

What you'll do

  • Own verification of digital blocks and SoC features through coverage closure
  • Develop feature-based verification plans from product and architecture specifications
  • Build reusable SystemVerilog and UVM test environments
  • Create constrained-random and targeted tests for functionality and error recovery
  • Drive functional, code, toggle, FSM and assertion coverage closure
  • Debug failures and automate regression, triage and reporting workflows

Skills

Must have

  • Systemverilog
  • Uvm
  • Constrained random verification
  • Functional coverage
  • Systemverilog assertions
  • RTL debug
  • Digital design verification
  • Linux
  • Python

Nice to have

Tools

  • Cadence xcelium
  • Simvision
  • Vmanager
  • Jaspergold
  • Synopsys vcs
  • Verdi
  • Bash
  • Perl
  • Tcl

Who it's for

Education
Engineering degree
Degree
electrical engineering, computer engineering, computer science
Experience
7+ years
Domain
semiconductors

About Renesas Electronics

Renesas Electronics has 63 open roles in Bangalore, at Renesas Electronics India, Bagmane Tech Park. See every Renesas Electronics role.

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