Staff Engineer, STA and Synthesis

Renesas develops semiconductor products for automotive, industrial, infrastructure and IoT markets. The STA Engineer will analyze timing, develop constraints and drive timing closure and signoff for block- and full-chip designs.

• Perform block-level and full-chip static timing analysis across modes and corners
• Debug setup, hold, recovery, removal, clock gating and signal integrity violations
• Develop and validate SDC timing constraints
• Drive timing closure through ECO implementation and optimization
• Support pre-layout and post-layout timing signoff
• Generate timing reports and communicate closure status

Experience

7 to 10 years

Domain

semiconductors

Renesas Electronics has 63 open roles in Bangalore, at Renesas Electronics India, Bagmane Tech Park. See every Renesas Electronics role.