Principle DFT Engineer

Marvell develops semiconductor solutions for connectivity across networking, cloud, and data center infrastructure. The engineer will own DFT architecture, implementation, verification, and post-silicon bring-up for complex IPs and SoCs.

• Define DFT architecture and test strategies for IPs and SoCs
• Implement and integrate scan, ATPG, JTAG, MBIST, and boundary scan
• Develop hierarchical DFT flows and validate test features
• Generate and verify production test patterns and test-mode simulations
• Support test timing constraints and STA signoff
• Lead post-silicon bring-up, ATE debug, and production ramp-up

Education

Master's degree

Degree

computer science, electrical engineering, electronics

Experience

12+ years

Domain

semiconductors networking

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