Timing & Power Analysis CAD Engineer

Marvell develops semiconductor solutions for enterprise, cloud, AI, and carrier infrastructure. This engineer will develop and support automated timing and power analysis flows, signoff, and reporting for ASIC designs.

• Develop and maintain PrimeTime and PrimePower signoff flows
• Enable in-design timing and power flows for physical implementation
• Automate timing and power execution, debugging, and reporting with Tcl and Python
• Generate and validate power analysis reports across ASIC projects
• Support timing and power signoff closure for tapeout
• Evaluate EDA vendor features and report tool issues

Education

Engineering degree

Degree

electrical engineering, electronics engineering, computer science

Experience

6 to 10 years

Languages

english

Domain

semiconductors

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