Soc Design Verification Director

Astera Labs provides semiconductor connectivity solutions and software for rack-scale AI infrastructure. The director will lead SoC verification strategy and execution while building and guiding the verification team.

• Define SoC verification methodology and integrate IP-level verification into system environments
• Lead, mentor, and grow a team of verification engineers
• Guide verification of SoC subsystems, interconnects, and protocols
• Champion UVM, formal verification, emulation, and AI-augmented verification flows
• Collaborate with design, architecture, firmware, and validation teams to debug verification issues
• Represent verification in executive reviews, customer engagements, and industry forums

Education

Engineering degree

Degree

electrical engineering, computer engineering

Experience

20+ years

Domain

ai infrastructure semiconductors

Astera Labs has 11 open roles in Bangalore, at Astera Labs Bengaluru, Helios Business Park. See every Astera Labs role.